DRAM Cache vs DRAM-Less SSDs: What Actually Changes
A DRAM cache is a dedicated chip holding an SSD's mapping table. DRAM-less drives substitute Host Memory Buffer (borrowed system RAM) or lean on SLC caching (a NAND write buffer) instead - a separate mechanism vendors often bundle together. Per sourced vendor datasheets, Samsung's 990 PRO carries DRAM; its 990 EVO Plus and Fanxiang's S660 do not.
Vendor datasheets read 15 September 2026. Catalogue figures last refreshed .
Three mechanisms, one conflated question
“Does this SSD have DRAM?” sounds like one question. It is actually asking about three separate, independent mechanisms that a marketing spec sheet routinely blurs together, and understanding the difference is the single most useful piece of technical literacy for buying budget or mid-range NVMe storage.
DRAM cache - the mapping table
Every SSD needs to track where each piece of data actually lives on its NAND, because flash memory cannot be overwritten in place the way a hard drive's sectors can - the controller maintains a logical-to-physical mapping table (often called the FTL, or flash translation layer) and updates it constantly. A dedicated DRAM chip gives the controller fast, low-latency access to that entire table. Samsung's own datasheet for the 990 PRO states this plainly in its hardware table: a “DRAM Cache Memory” row listing 1GB of LPDDR4 at the 1TB capacity, scaling to 2GB and 4GB at the larger capacities.
Company's own words DRAM Cache Memory specification from Samsung V-NAND SSD 990 PRO Data Sheet, Revision 2.0, Samsung Electronics Co., Ltd (official PDF datasheet). Read 15 September 2026.
Host Memory Buffer - borrowed, not built in
A DRAM-less drive still needs somewhere to keep that mapping table, and Host Memory Buffer is the NVMe-standard answer: the drive borrows a small slice of the host system's own RAM, over the NVMe protocol, instead of carrying a dedicated chip. NVM Express, the non-profit standards body that defines the NVMe protocol itself, publishes the specification HMB is part of. Samsung uses exactly this mechanism one tier down from the 990 PRO: the 990 EVO Plus's own datasheet lists its cache memory as “HMB (Host Memory Buffer)” in the identical table position where the 990 PRO's sheet lists DRAM - the same manufacturer, the same document format, two different mechanisms stated plainly for two different products.
Company's own words NVMe as the standards body's own protocol, per NVMe Specifications, NVM Express, Inc. (the standards body). Read 15 September 2026.
Company's own words HMB cache memory specification from Samsung V-NAND SSD 990 EVO Plus Data Sheet, Revision 1.0, Samsung Electronics Co., Ltd (official PDF datasheet). Read 15 September 2026.
Because HMB depends on the host lending it memory, it depends on host OS and driver support to work at all - a mechanism the drive cannot supply by itself, unlike a DRAM chip soldered to its own board. That dependency is inherent to what HMB is, not a defect of any specific drive that uses it.
SLC caching - a write buffer, not a mapping cache
This is the mechanism most easily confused with DRAM cache, and it does an entirely different job. Rather than caching the mapping table, SLC caching reserves a portion of the drive's own TLC or QLC NAND and runs it in single-bit-per-cell mode - higher write throughput, lower in density - as a buffer for incoming writes. Samsung's own support documentation for its version, branded Intelligent TurboWrite, describes it exactly this way: the feature “improves performance by increasing write speeds through internal SLC buffering,” and incoming writes go “to the SLC Buffering area instead” of the multi-bit cells directly.
Company's own words Intelligent TurboWrite / SLC buffering description from Internal SSD Product Information (FAQ) - Intelligent TurboWrite, Samsung Semiconductor (official support site). Read 15 September 2026.
Critically, Samsung's own documentation states that buffered data “moves to the multi-bit cell, freeing up space in the SLC Buffering area” once the drive is idle. Read carefully, that is the vendor stating the buffer is reclaimed when idle - not continuously, and not mid-transfer. A sustained write large enough to exceed the buffer therefore runs out of fast-cache room before the transfer finishes and the drive falls back to writing at the NAND's native rate. That is a documented property of how the mechanism works, stated by the vendor describing its own feature, not a benchmark claim or a ranking of any drive.
What the buyer is actually choosing between
None of the three mechanisms above is categorically better - they are different engineering trade-offs, and which one a drive uses says more about its market tier and price point than about a single axis of quality. A DRAM cache adds a component and a cost; HMB removes that cost by depending on the host instead; SLC caching is present on nearly every consumer NAND-based SSD regardless of whether it also has DRAM, because TLC and QLC NAND is slow to write to directly at any tier.
What we will not do on this page is convert any of that into a verdict. We publish no benchmark numbers and no speed comparisons between the mechanisms - the vendor documentation above describes how each one behaves, and what that means for your specific workload is a judgement only you can make with your own usage pattern in mind. A short, bursty workload (booting, launching games, everyday file copies) rarely comes near any of these limits. A long, sustained, queued write - installing several large games back to back, or copying a video library in one pass - is where the mechanism you have starts to matter.
What we track, grouped by sourced architecture
Computed live from our own catalogue at the timestamp above: every tracked, in-stock consumer M.2 NVMe listing (drive_type PS5-SSD, our catalogue's full consumer NVMe set regardless of PS5 marketing angle), grouped by the architecture we could source for that specific model and its live $/GB range. We currently hold 137 such listings. 116 of them are unverified for cache architecture - no vendor document we could read states it for that model - and every one of those is excluded from the figures below rather than assumed.
| Architecture | Tracked listings | $/GB range (live) | Cheapest in this group | |
|---|---|---|---|---|
| DRAM-less (dynamic SLC cache) | 4 | $0.132/GB - $0.200/GB | fanxiang S660 PCIe 4.0 4TB NVMe M.2 SSD for PS5 with Heatsink $529.99 | Buy |
| DRAM-less (HMB) | 5 | $0.132/GB - $0.237/GB | Samsung SSD 990 EVO Plus 4TB $529.99 | Buy |
| DRAM cache | 12 | $0.162/GB - $0.339/GB | Samsung SSD 990 PRO 4TB $649.99 | Buy |
Sourcing is deliberately narrow rather than assumed: a model appears in a group only where we read a vendor document (or, for Fanxiang, a dated independent teardown) stating its architecture. That currently covers Samsung's 990 PRO and 990 EVO Plus and Fanxiang's S660 - see the S660 page and the Fanxiang brand page for the full per-model detail. This table grows as more models get a sourced read, never by inference from a brand's reputation or a listing's marketing copy.
Where this applies elsewhere on the site
Fanxiang SSDs: who makes them and what's inside applies this exact distinction to one budget brand in full, including the one model (S660) we could source and the two (S880R, S790R) we could not. The budget-brand hub applies the same sourcing discipline across every budget SSD brand we stock. And Sony's published PS5 SSD requirements make no mention of cache architecture at all - a compliant drive is compliant regardless of which of the three mechanisms above it uses, which is worth knowing before paying a premium for a spec the console does not check.
Frequently asked questions
Does DRAM-less mean slow?
Not by itself, and vendor documentation does not frame it that way either - Samsung sells its DRAM-less 990 EVO Plus and its DRAM-equipped 990 PRO side by side as different tiers of the same current-generation family, not as fast-versus-slow. What a DRAM-less drive lacks is a dedicated chip for its mapping table; it substitutes Host Memory Buffer, borrowed system RAM, or leans harder on SLC caching instead. Whether that matters to you depends on your workload - sustained, queued writes well past the SLC cache are where the substitution is most visible, and short bursts of everyday use are where it is least visible. We publish no benchmark verdict on this page; we publish which mechanism each sourced model uses and let the workload decide.
What does a DRAM cache actually do on an SSD?
It holds the drive's logical-to-physical mapping table - the index the controller uses to find where a piece of data actually lives on the NAND - in fast, dedicated memory rather than on the NAND itself. Samsung's own datasheet for the 990 PRO lists a DRAM Cache Memory row explicitly (1GB LPDDR4 at 1TB, scaling to 4GB at 4TB), confirmed by reading the vendor's own document rather than inferred from marketing copy.
What is Host Memory Buffer (HMB)?
A mechanism defined for NVMe SSDs where a DRAM-less drive borrows a small slice of the host system's own RAM, over the NVMe protocol, to hold its mapping table instead of carrying a dedicated chip for it. NVM Express, the standards body that defines NVMe, publishes the specification HMB is part of. Samsung's own 990 EVO Plus datasheet lists "Cache Memory: HMB (Host Memory Buffer)" in the exact slot where the 990 PRO's datasheet lists DRAM - the same manufacturer using both mechanisms across two models in the same family, documented in both vendor sheets.
Is SLC caching the same thing as a DRAM cache?
No, and this is the distinction most budget-SSD content conflates. A DRAM cache holds the mapping table - a small, fixed-purpose index. SLC caching is a write cache: a portion of the drive's own TLC or QLC NAND is run in a lower-density, higher-write-throughput single-bit-per-cell mode as a buffer for incoming writes. Samsung's own support documentation describes its version ("Intelligent TurboWrite") as writing to an "SLC Buffering area" and moving that data to the multi-bit cells later, when the drive is idle - a mechanism entirely separate from, and unrelated to, whether the drive also carries a DRAM mapping-table cache.
Why does an SSD slow down when I copy a lot of data at once?
Per the vendor documentation this page cites, an SLC write cache is finite, and the vendor's own description says the buffered data moves to permanent multi-bit storage when the drive is idle - which is another way of saying it does not get reclaimed mid-transfer. A sustained write large enough to exceed that buffer runs out of fast-cache room before it finishes, and the drive falls back to writing directly to the NAND at its native, slower rate. This applies to SLC-caching designs generally, DRAM-equipped or not, and it is a documented property of how the caching works rather than a defect in any specific drive.
Which of your tracked drives have DRAM cache?
Only the ones we have a vendor document confirming, listed in the table above with the source. As of the timestamp on this page that is Samsung's 990 PRO. Every other row in our tracked consumer NVMe catalogue is either confirmed DRAM-less (Samsung 990 EVO Plus via HMB, Fanxiang S660 via dynamic SLC cache) or unverified, and unverified rows are excluded from every group figure rather than guessed at.
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